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[Crack Hack] rom_des.zip

Description: DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。
Platform: | Size: 30494 | Author: | Hits:

[Other resource] wave_gen

Description: 波形发生器，带TESTBENCH， 多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn -waveform generator, with TESTBENCH. Multi-platform -- the design makes use of the new shift opera tors available in the VHDL-93 std -- this design passes the Synplify synthesis check -- downloa d from : www.fpga.com.cn
Platform: | Size: 1184 | Author: 罗兰 | Hits:

[Other resource] mdct.tar

Description: 这是06年4月刚刚完成的程序，从opencore.org下载而来。用vhdl语言描写，以及matlab仿真，testbench，以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation. -This is April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete cosin e transform implementation designed for use in JPEG compression systems like. Architecture i 's based on parallel distributed arithmetic wit h butterfly computation.
Platform: | Size: 1767014 | Author: 陈朋 | Hits:

[Other resource] simplevhdl

Description: 我是VHDL的初学者，这是我自己编译的简单的几个VHDL码，功能有3-8解码器及其testbench,16位寄存器及其testbench和交通灯。 希望能和其他初学者一起讨论学习，并得到高手的指点-I VHDL beginners, this is my own translation of a few simple VHDL code. 3 -8 function decoder and testbench, 16 Register and testbench and traffic lights. Hopes to be able to discuss other beginners learning, and with the guidance of the master
Platform: | Size: 4034 | Author: yvonne | Hits:

[Other resource] ModelSim_TestBench_VHDL

Description: ModelSim TestBench的VHDL模版-ModelSim VHDL template TestBench
Platform: | Size: 1468 | Author: 汤维 | Hits:

[Develop Tools] VHDL_TESTBENCH

Description: 怎样用VHDL写TESTBENCH.rar VHDL仿真-how to use VHDL to write VHDL simulation TESTBENCH.rar
Platform: | Size: 9595109 | Author: 高 | Hits:

[Other resource] RISCMCU

Description: riscMCU的VHDL实现，内附有modelsim仿真testbench和文档说明-riscMCU VHDL, modelsim containing a simulation testbench and documentation shows
Platform: | Size: 595407 | Author: wutailiang | Hits:

[Other resource] core_arm.tar

Description: vhdl的arm核 包含testbench
Platform: | Size: 666523 | Author: dc | Hits:

[Other resource] counter

Description: VHDL计数器的TestBench，适合初学者
Platform: | Size: 1022 | Author: hbsun | Hits:

[Other resource] color_converter.tar

Description: 此代码实现不同图像颜色制式之间的相互转换，如XYZ<->RGB, 不同标准的RGB<->RGB 以及RGB<->YCbCr之间的转换，包内含有matlab仿真代码m文件、VHDL代码.v文件以及modelsim仿真的testbench文件，相信对大家有一定的帮助
Platform: | Size: 340094 | Author: 王弋妹 | Hits:

[Other resource] spi_boot-rel_3_2_rev_C.tar

Description: spi bootloader详细资料，里面包含C代码和VHDL代码以及testbench以及相关的说明文档，有兴趣的朋友可以下来看看。
Platform: | Size: 192895 | Author: zheng jun | Hits:

[Other resource] ArtofWritingTestBenches

Description: Art of Writing TestBenches：极经典的testbench书写入门书籍，能够让初学者在短时间内掌握testbench的书写步骤，对testbench有一个初步的认识，这是一个verilog方面的，没找到verilog就选了开发环境为vhdl
Platform: | Size: 97994 | Author: 侯浩 | Hits:

[Other resource] rom

Description: 我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证
Platform: | Size: 651381 | Author: jimmy | Hits:

[Other resource] PWM

Description: 脉冲宽度调制，VHDL代码编写，包括QUARTUSII和MODELSIM工程以及testbench
Platform: | Size: 348573 | Author: horse | Hits:

[Other resource] flash接口控制_verilog

Description: flash接口控制器的VHDL以及verilog源代码和Testbench程序-flash interface controller VHDL and Verilog source code and procedures Testbench
Platform: | Size: 870604 | Author: 李楠 | Hits:

[Other resource] pll

Description: 用VHDL写的数字锁相环程序 pll.vhd为源文件 pllTB.vhd为testbench-pll.vhd : PLL written in VHDL hardware language. pllTB.vhd is a test program for pll.vhd.
Platform: | Size: 111853 | Author: 孙犁 | Hits:

[MPI] floatmul

Description: 采用VERILOG 语言进行设计 实现32位浮点数乘法运算 结果已经验证过 放心使用-Verilog design language used to achieve 32-bit floating-point multiplication results have been verified ease of use
Platform: | Size: 1024 | Author: NOVEI | Hits:

[MiddleWare] FinalCodelast

Description: last cordic for immplemantaion of cordic with vhdl language it has testbench
Platform: | Size: 8192 | Author: akhlaghi | Hits:

[Software Engineering] vhdl_testbench_tutorial

Description: This file learns how to write testbench in vhdl
Platform: | Size: 525312 | Author: mohebraba | Hits:

[VHDL-FPGA-Verilog] dct_parallel.tar

Description: paralel DCT hardware in verilog with testbench
Platform: | Size: 348160 | Author: victor | Hits:
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